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High Speed, Combi-SenseTM Two-Phase, Synchronous MOSFET Driver
POWER MANAGEMENT Description
The SC1214 is a high speed, Combi-SenseTM, two-phase driver designed to drive high-side and low-side MOSFETs in two synchronous Buck converters. The driver combined with Combi-Sense PWM controllers, such as Semtech SC2643VX or SC2643, provides a cost effective two-phase voltage regulator for advanced microprocessors The Combi-SenseTM is a technique to sense the inductor current for peak current mode control of voltage regulator without using sensing resistor. It provides the following advantages: - No costly precision sensing resistor - Lossless current sensing - High level noise free signal - Fast response - Suitable for wide range of duty cycle The detailed explanation of the technique can be found in the Applications Information section. A 30ns max propagation delay from input transition to the gate of the power FET's guarantees operation at high switching frequencies. Internal overlap protection circuit prevents shoot-through from Vin to PGND in the main and synchronous MOSFETs. The adaptive overlap protection circuit ensures the bottom FET does not turn on until the top FET source has reached 1V, to prevent crossconduction. High current drive capability allows fast switching, thus reducing switching losses at high (up to 1.5MHz) frequencies without causing thermal stress on the driver. Under-voltage-lockout and over-temperature shutdown features are included for proper and safe operation. Timed latches and improved robustness are built into the housekeeping functions such as the Under Voltage Lockout and adaptive Shoot-through protection circuitry to prevent false triggering and to assure safe operation. The SC1214 is offered in a TSSOP-20 package.
SC1214
Features
u u u u u u u u u u u u
High efficiency +12V gate drive voltage High peak drive current Adaptive non-overlapping gate drives provide shoot-through protection Support Combi-SenseTM and VID-on-fly operations Fast rise and fall times (15ns typical with 3000pf load) Ultra-low (<30ns) propagation delay (BG going low) Floating top gate drive Crowbar function for over voltage protection High frequency (to 1.5 MHz) operation allows use of small inductors and low cost ceramic capacitors Under-voltage-lockout Low quiescent current
Applications
u Intel Pentium(R) processor power supplies u AMD AthlonTM and AMD-K8TM processor power supplies u High current low voltage DC-DC converters
May 9, 2005
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VIN ATX12V 2 C3 R2 100 10 9 8 7 6 5 4 3 2 1 VIN D1N4148 1uF 1R0 M3 U1 M4 1nF M1 M2 BG2 VR EG2 BST1 VIN 2 VPN 2 C O1 TG1 PGN D DRN1 NC C1 4.7uF D1 C2 R1 640nH 1800uF/16V 1800uF/16V 4.7uF/1206 C7 + C5 + C4 ATX12V 1 L1 VPN2 VIN
4.7uF/1206
1800uF/16V
C8
C6
+
11
12
13
14
15
16
17
18
19
Note (1)
M5 M6 C9 2.2nF R5 C11 D2 1R0 VIN
20
IR0
NC
R3
PGN D
DRN2
VPN 1
BST2
VIN 1
VOUT C O2 TG2 BG1
VR EG1
2 1
L2
SC1214
PN2
PN1
1
L3
2
VOUT
R4
IR0 M7 R6 100 C12 4.7uF VPN1 R7 C13 1nF M8
C10
+ COUT1
2.2nF
PGND
1uF D1N4148
VPN1 VPN2
VOUT
0R0
Note (1)
C14 R10
R8 R9
C15 C16 R11 R12
R13
VRM_EN
U2 R14 1.5K R16 R15 R17 OFFSETC18 1uF C19 20 1 OS2 OS1 2 3 C20 0.1uF 4 5 ATX12V R18 10 VCC 6 7 C21 4.7uF 8 9 BGOUT ERROUT GNDSEN FB DACSTEP VCC VID4 VID3 OUTSEN OUT2 OUT1 AGND OSCREF VID5 PGOOD VID0 VID1 VID2 19 18 17 16 15 13 14 12 11 10 ROSC1
(Open Collector/Drain Input, No Pull-up)
VCC
OFFSET+
Pull-up Voltage VR10: 2V VRM9.x: 5V K-8: 12V
POWER MANAGEMENT Typical Application Circuit
VID5
VID0
SC2642
DIFFERENTIAL PAIR FOR REMOTE SENSE
V_COREV_CORE+
VID1
VID2
VID3
VID4
Note (2)
Note (2)
PWRGOOD (Open Collector Output)
Notes: (1) Output filter design: Please follow guidelines issued by Intel and AMD . (2) Please follow the guidelines issued by Intel and AMD .
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SC1214
SC1214
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter VI N Supply Voltage BST, TG to D RN BST to PGND BST to PGND Pulse D RN to PGND D RN to PGND Pulse BG to PGND VREG to PGND VPN to PGND VPN to PGND Pulse PWM Input C onti nuous Power D i ssi pati on Thermal Resi stance Juncti on to C ase Operati ng Juncti on Temperature Range Storage Temperature Range Lead Temperature (Solderi ng) 10 Sec.
Symbol VI N VBST-DRN, VTG-DRN VBST-PGND VBST-PULSE VDRN-PGND VDRN-PULSE VBG-PGND VREG-PGND V PN VPN-PULSE CO PD
C onditions
Maximum 16 11 40
U nits V V V V V V V V V V V W C /W C C C
tPULSE < 100ns
45 -2 to 30
tPULSE < 200ns
-5 to 35 11 11 16
tPULSE < 100ns
20 -0.3 to 8.5
TA = 25C , TJ =125C
1.76 17
TJ TSTG TLEAD
0 to +150 -65 to +150 300
NOTE: (1) This device is ESD sensitive. Use of standard ESD handling precautions is required.
Electrical Characteristics
Unless specified: TA = 25C; VIN = 12V; VREG = 8.5V
Parameter Pow er Supply Supply Voltage Qui escent C urrent, Operati ng U nder Voltage Lockout Start Threshold of VREG Voltage Hysteresi s Internal LD O LD O Output D rop Out Voltage
Symbol
C onditions
Min
Typ
Max
U nits
VI N Iq_op
9
12 3.0
15
V mA
VREG_START VhysUVLO
4 160
4.3
V mV
VREG VDROP
VI N = 9V to 15V VI N = 5V to 8.8V
3
8.5 0.3
V V
2005 Semtech Corp.
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SC1214
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: TA = 25C; VIN = 12V; VREG = 8.5V
Parameter C O1, C O2 Logi c Hi gh Input Voltage Logi c Low Input Voltage Thermal Shutdow n Over Temperature Tri p Poi nt Hysteresi s H igh Side D river (TG1, TG2) Output Impedance Ri se Ti me Fall Ti me Propagati on D elay, TG Goi ng Hi gh Propagati on D elay, TG Goi ng Low Low -Side D river (B G1, B G2) Output Impedance Ri se Ti me Fall Ti me Propagati on D elay, BG Goi ng Hi gh Propagati on D elay, BG Goi ng Low BG1, BG2 Mi ni mum Off-ti me(1) U nder-Voltage-Lockout Time D elay VREG rampi ng up VREG rampi ng down
Symbol
C onditions
Min
Typ
Max
U nits
VCO_H VCO_L
2.0 0.8
V V
TOTP THYST
155 10
C C
RSRC_TG RSINK_TG tR_TG tF_TG tPDH_TG tPDL_TG
1.5 VBST - VDRN = 8.5V C L = 3.3nF, VBST - VDRN = 8.5V C L = 3.3nF, VBST - VDRN = 8.5V VBST - VDRN = 8.5V VBST - VDRN = 8.5V 1.0 15 10 37 30
3.0 2.0
Ohm ns ns ns ns
RSRC_BG RSINK_BG tR_BG tF_BG tPDH_BG tPDL_BG tOFF_BG
VREG = 8.5V C L = 3.3nF, VREG = 8.5V C L = 3.3nF, VREG = 8.5V VREG = 8.5V VREG = 8.5V
1.5 1.5 10 10 20 27 75
3.0 3.0
Ohm ns ns ns ns ns
tPDH_UVLO tPDL_UVLO
2 2
s s
NOTE: (1) Guaranteed by design.
2005 Semtech Corp.
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SC1214
POWER MANAGEMENT Timing Diagrams
CO
DRN
1.0V
TG tPDH_TG tR_TG tPDL_TG tF_TG
BG tPDL_BG tF_BG
1.4V
tPDH_BG
tR_BG
Rising Edge Transition
Falling Edge Transition
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SC1214
POWER MANAGEMENT Pin Configurations
Top View
Ordering Information
Device P ackag e
(1)
Temp. Range( Tj) 0 - 125C 0 - 125C
DRN1 TG1 BST1 CO1 NC VPN2 VIN2 VREG2 BG2 PGND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
PGND BG1 VREG1 VIN1 VPN1 NC CO2 BST2 TG2 DRN2
SC1214TSTR SC1214TSTRT(1)(2)
TSSOP-20 TSSOP-20
Note: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant.
(20-Pin TSSOP)
Pin Descriptions
Pin# 2,12 1,11 3, 13 18,8 4,14 16,6 10, 20 19,9 17,7 Pin Name TG1, TG2 DRN1, DRN2 BST1, BST2 VREG1,VREG2 CO1, CO2 VPN1, VPN2 PGND BG1, BG2 VIN1,VIN2 Pin Function Output gate drive for the switching (top) MOSFET. The power phase node (or switching node) of the synchronous buck converter. This pin can be subjected to a negative spike up to -VREG relative to PGND without affecting operation. Bootstrap pin. A capacitor is connected between BST and DRN pins to develop the floating bootstrap voltage for the high-side MOSFET. The capacitor value is typically 1F (ceramic). LDO output. Decouple with 1F to 4.7F (ceramic) with lead length no more than 0.2" (5mm). Logic level PWM input signal to the SC1214 supplied by external controller. An internal 50kohm resistor is connected from this pin to PGND. Virtual Phase Node. Connect an RC between this pin and the output sense point to Enable Combi-Sense TM operation. See the Typical Application Circuit. Ground. Keep these pins close to the synchronous MOSFETs source. Output gate drive for the synchronous (bottom) MOSFET. Supply power for low gate drive, LDO and the internal Combi-Sense input power rail of the converter.
TM
circuitry. Connect to
2005 Semtech Corp.
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SC1214
POWER MANAGEMENT Block Diagram
VIN1,2
LDO
VREG1,2
UVLO
LOGIC
VPN1,2
BST1,2 CONTROL & OVERLAP PROT ECTION CIRCUIT TG1,2 DRN1,2
CO1,2
PGND
BG1,2
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SC1214
POWER MANAGEMENT Outline Drawing - TSSOP-20
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.002 .031 .007 .003 .251 .169 .047 .006 .042 .012 .007 .255 .259 .173 .177 .252 BSC .026 BSC .018 .024 .030 (.039) 20 0 8 .004 .004 .008 0.05 0.80 0.19 0.09 6.40 4.30 1.20 0.15 1.05 0.30 0.20 6.50 6.60 4.40 4.50 6.40 BSC 0.65 BSC 0.45 0.60 0.75 (1.0) 20 0 8 0.10 0.10 0.20
A e N 2X E/2 E1 PIN 1 INDICATOR ccc C 2X N/2 TIPS 123 E D
DIM
A A1 A2 b c D E1 E e L L1 N 01 aaa bbb ccc
e/2 B
aaa C SEATING PLANE
D A2 A
C bxN bbb
A1 C A-B D GAGE PLANE 0.25
H c
L (L1) DETAIL
01
SIDE VIEW
SEE DETAIL
A
A
NOTES: 1. 2. 3. 4. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -HDIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. REFERENCE JEDEC STD MO-153, VARIATION AC.
Land Pattern - TSSOP-20
X
DIM
(C) G Z C G P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.222) .161 .026 .016 .061 .283 (5.65) 4.10 0.65 0.40 1.55 7.20
Y P
NOTES: 1.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
2005 Semtech Corp. 8 www.semtech.com

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